Distributed Queue Dual Bus (DQDB) digital networks have been proposed for interconnecting host computers, local area networks, servers and workstations. Each such DQDB network consists of a plurality of stations interconnected by two unidirectional busses, one for each direction of transmission. Fixed length time slots are generated on each bus which can be used by the stations to transmit a fixed length data segment downstream on the appropriate one of the two busses to the downstream destination station on that buss. Each slot includes a slot access header which, in turn, includes a busy bit indicating whether the slot is occupied or empty. Also included in the slot header are request bits by means of which stations indicate their wish to transmit a data segment on one of the dual busses. Each station then monitors the busy bits and the request bits on both busses, incrementing a counter for each received request bit and decrementing a counter for each received empty slot. A separate request counter is required for each bus to control the introduction of data segments into the time slots on the two busses.
If a station wishes to transfer a segment on bus A, the current count in the bus A request counter is transferred to a bus A countdown counter (resetting the request counter) and a request for a time slot is inserted in the first available slot on bus B. The countdown counter is decremented for each empty slot passing the station on bus A. When the countdown counter reaches zero, the station seizes the next empty time slot on bus A for transmission of the waiting data segment. Similar operations take place for transmission on bus B, using a bus B request counter and a bus B countdown counter. All stations on the DQDB network are simultaneously carrying on this counting process for each direction of transmission, thereby justifying the name "distributed queue dual bus" system. The distributed queue dual bus network is defined in the proposed IEEE Standard 802.6, Version D.0, June 1988.
It has been found that DQDB networks such as that described above, under heavy load, distribute the traffic among the various nodes or stations in a highly asymmetrical manner. The station which has first started transmission obtains the biggest share of the available bandwidth. Moreover, the service provided to a station depends upon the propagation delay between that station and the currently active station. In order to overcome these disadvantages, a bandwidth balancing mechanism has been proposed by E. Hahne, A Choundhury and N. Maxemchuk in "Improving the Fairness of Distributed-Queue Dual-Bus Networks," Proceedings of INFOCOM '90, San Francisco, June 1990. A balancing counter is maintained in each station for each bus to count the number of transmitted segments. A station is allowed to transmit only a fraction of the time during which its countdown counter is zero and an empty time slot is received. This fraction, called the bandwidth balancing modulus, can be set at some appropriate value such as eight. That is, the active station allows every ninth time slot to pass unused, thus allowing downstream stations to utilize that time slot. This mechanism increases the rate at which the downstream station can send out requests, hence increasing the bandwidth available to such downstream stations.
There are two main problems with this proposed bandwidth balancing mechanism. If the balancing modulus is maintained constant all of the time, the overhead for balancing is excessive for asymmetrical (e.g., single station) traffic. On the other hand, if the balancing modulus is varied from a central location, its response to bursty traffic will be extremely slow. More importantly, however, the bandwidth balancing mechanism described in the Hahne et al. article is not able to support the multi-level priorities specified as part of the IEEE 802.6 standard. Most systems include traffic with different priority needs, such as data bursts and real time traffic.